US 11,917,812 B2
Semiconductor devices
Sohyeon Bae, Seoul (KR); Wonchul Lee, Seongnam-si (KR); Jaehyun Kim, Cheonan-si (KR); Jaehyuk Jang, Hwaseong-si (KR); and Hyebin Choi, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 24, 2021, as Appl. No. 17/484,679.
Claims priority of application No. 10-2021-0023131 (KR), filed on Feb. 22, 2021.
Prior Publication US 2022/0271041 A1, Aug. 25, 2022
Int. Cl. H10B 12/00 (2023.01); H01L 23/528 (2006.01)
CPC H10B 12/315 (2023.02) [H01L 23/528 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a gate structure on a substrate, the gate structure extending in a first direction parallel to an upper surface of the substrate and including,
a first conductive pattern,
a second conductive pattern on the first conductive pattern, and
a gate mask on the second conductive pattern; and
a contact plug contacting an end portion in the first direction of the gate structure, the contact plug including,
a first extension portion extending in a vertical direction perpendicular to the upper surface of the substrate and contacting sidewalls of the gate mask and the second conductive pattern,
a second extension portion under the first extension portion and contacting the first extension portion and a sidewall of the first conductive pattern, and
a protrusion portion under the second extension portion and contacting the second extension portion, a bottom of the protrusion portion not contacting the first conductive pattern,
wherein a first angle of a sidewall of the first extension portion with respect to the upper surface of the substrate is greater than a second angle of a sidewall of the second extension portion with respect to the upper surface of the substrate.