CPC H01L 27/11807 (2013.01) [H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2027/11838 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11879 (2013.01); H01L 2027/11881 (2013.01)] | 32 Claims |
1. A method of manufacturing a programmable logic device from disaggregated device components, the method comprising:
forming one or more routing layers on a wafer; and
hybrid bonding one or more dies comprising logic components to the wafer to form, via the one or more routing layers, a plurality of routing paths communicatively coupling at least some of the logic components of the one or more dies to one another to form the programmable logic device.
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