US 11,915,980 B2
Residue-free metal gate cutting for fin-like field effect transistor
Ya-Yi Tsai, Hsinchu (TW); Yi-Hsuan Hsiao, Hsinchu (TW); Shu-Yuan Ku, Hsinchu County (TW); Ryan Chia-Jen Chen, Chiayi (TW); and Ming-Ching Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Dec. 12, 2022, as Appl. No. 18/064,726.
Application 18/064,726 is a continuation of application No. 17/195,189, filed on Mar. 8, 2021, granted, now 11,527,443.
Application 17/195,189 is a continuation of application No. 16/665,252, filed on Oct. 28, 2019, granted, now 10,943,828, issued on Mar. 9, 2021.
Application 16/665,252 is a continuation of application No. 15/938,812, filed on Mar. 28, 2018, granted, now 10,460,994, issued on Oct. 29, 2019.
Claims priority of provisional application 62/592,826, filed on Nov. 30, 2017.
Prior Publication US 2023/0105271 A1, Apr. 6, 2023
Int. Cl. H01L 21/8234 (2006.01); H01L 27/088 (2006.01)
CPC H01L 21/823437 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first fin structure and a second fin structure disposed over a substrate;
a dielectric isolation structure disposed on the substrate and extending from the first fin structure to the second fin structure;
a first interlayer dielectric layer disposed on the first fin structure and the second fin structure;
a first material layer disposed directly on the first interlayer dielectric layer;
a second material layer disposed directly on the first material layer, the second material being formed of a different material than the first material layer; and
a second interlayer dielectric layer extending through the second material layer, the first material layer, the first interlayer dielectric layer and a portion of the dielectric isolation structure, and wherein the second interlayer dielectric layer is formed of a different material than the first interlayer dielectric layer, and wherein a top surface of the second material layer is covered by the second interlayer dielectric layer, the top surface of the second material layer facing away from the substrate.