CPC G11C 16/3495 (2013.01) [G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 29/10 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] | 20 Claims |
1. A method of reducing reliability degradation of a nonvolatile memory device that includes a plurality of memory cells connected to a plurality of wordlines, the method comprising:
providing the nonvolatile memory device in which initial data having an initial threshold voltage distribution is stored in the plurality of memory cells connected to the plurality of wordlines;
before a first process is performed on the nonvolatile memory device, performing a first write operation such that first data having a first threshold voltage distribution is stored into memory cells connected to first wordlines, the first process being a process that causes reliability degradation of the plurality of memory cells, the first threshold voltage distribution being different from the initial threshold voltage distribution, the first wordlines having a degree of reliability degradation less than a reference value among the plurality of wordlines; and
before the first process is performed on the nonvolatile memory device, performing a second write operation such that second data having a second threshold voltage distribution is stored into memory cells connected to second wordlines, the second threshold voltage distribution being different from the first threshold voltage distribution, the second wordlines having a degree of reliability degradation greater than or equal to the reference value among the plurality of wordlines.
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