CPC G06F 16/2308 (2019.01) [G06F 9/466 (2013.01); G06F 16/1774 (2019.01); G06F 16/2315 (2019.01); G06F 16/2322 (2019.01); G06F 16/2329 (2019.01); G06F 16/2336 (2019.01); G06F 16/2343 (2019.01); G06F 16/2379 (2019.01)] | 18 Claims |
1. A system comprising:
one or more processors;
memory storing instructions that, when executed by the one or more processors, cause the system to perform:
receiving, by a first dedicated timelock node of dedicated timelock nodes, a request for one or more first timestamps, wherein the dedicated timelock nodes comprise a leader node and a non-leader node;
if the first dedicated timelock node is the non-leader node, assigning the request to the leader node;
writing, by the leader node to a datastore, an upper bound for the request;
determining that the leader node has failed during issuing of the one or more first timestamps;
in response to determining that the leader node has failed, reassigning the non-leader node as a new leader node; and
completing, by the new leader node, issuing of one or more first second timestamps, based on the upper bound;
receiving an indication that the leader node has returned to an operational status;
in response to receiving the indication, reassigning the new-leader node back to a non-leader node; and
completing, by the leader node, issuing of the one or more first timestamps and one or more third timestamps.
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