US 11,914,518 B1
Apparatus and method for operating a cache storage
Yoav Asher Levy, Kfar Saba (IL); Elad Kadosh, Herzeliya (IL); Jakob Axel Fries, Lund (SE); and Lior-Levi Bandal, Kfar Saba (IL)
Assigned to Arm Limited, Cambridge (GB)
Filed by Arm Limited, Cambridge (GB)
Filed on Sep. 21, 2022, as Appl. No. 17/949,607.
Int. Cl. G06F 12/0884 (2016.01)
CPC G06F 12/0884 (2013.01) [G06F 2212/1021 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a cache storage comprising a plurality of entries to store data;
lookup circuitry, responsive to a given access request, to perform a lookup operation in the cache storage to determine whether one of the entries in the cache storage is allocated to store data associated with a memory address indicated by the given access request, to generate a hit indication for the given access request when one of the entries in the cache storage is allocated to store data associated with the memory address, and to otherwise generate a miss indication for the given access request;
wherein the lookup circuitry is configured to perform, during a single lookup period, lookup operations in parallel for up to N access requests, where N is a plural integer; and
the apparatus further comprises:
allocation circuitry configured to determine, during the single lookup period, at least N candidate entries for allocation from amongst the plurality of entries, and to cause one of the candidate entries to be allocated for each of the up to N access requests for which the lookup circuitry generates the miss indication;
vector providing circuitry to provide an input vector specifying a qualifying value for each of the plurality of entries; and
the allocation circuitry is arranged to determine the at least N candidate entries in dependence on the input vector.