US 11,895,828 B2
Semiconductor memory device
Jae Man Yoon, Gyeonggi-do (KR); Jin Hwan Jeon, Gyeonggi-do (KR); Tae Kyun Kim, Gyeonggi-do (KR); Jung Woo Park, Gyeonggi-do (KR); Su Ock Chung, Gyeonggi-do (KR); and Jae Won Ha, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Apr. 13, 2022, as Appl. No. 17/719,990.
Claims priority of application No. 10-2021-0130237 (KR), filed on Sep. 30, 2021.
Prior Publication US 2023/0102043 A1, Mar. 30, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/482 (2023.02) [H10B 12/0335 (2023.02)] 21 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an active region formed in a substrate, the active region including flat surfaces and hole-shaped recess portions;
upper-level plugs disposed over the flat surfaces;
a spacer disposed between the upper-level plugs, the spacer including a trench exposing the hole-shaped recess portions;
a lower-level plug filling the hole-shaped recess portions; and
a buried conductive line disposed over the lower-level plug and partially filling the trench.