US 11,895,821 B2
Semiconductor structure and manufacturing method thereof
Jingwen Lu, Hefei (CN); Haihan Hung, Hefei (CN); and Bingyu Zhu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 7, 2021, as Appl. No. 17/467,556.
Application 17/467,556 is a continuation of application No. PCT/CN2021/103618, filed on Jun. 30, 2021.
Claims priority of application No. 202010685792.6 (CN), filed on Jul. 16, 2020.
Prior Publication US 2022/0020749 A1, Jan. 20, 2022
Int. Cl. H01L 27/108 (2006.01); H01L 29/66 (2006.01); H10B 12/00 (2023.01)
CPC H10B 12/312 (2023.02) [H01L 29/6656 (2013.01); H10B 12/482 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A manufacturing method of a semiconductor structure, comprising:
providing a substrate;
forming, on an upper surface of the substrate, first patterns each comprising a first main body and a first flank wall covering a sidewall of the first main body;
forming a filling layer which covers the first flank walls and fills a gap between adjacent first patterns; and
etching a top of each of the first patterns to obtain second main bodies, second flank walls and protrusions located on upper surfaces of the second flank walls, the second flank wall covering a sidewall of the second main body, and a top of the protrusion being at least higher than a top of the second main body.