US 11,895,423 B2
Method of producing triggering signals for a control of a multimedia interface
Olivier Ferrand, Carry le Rouet (FR)
Assigned to STMICROELECTRONICS (ROUSSET) SAS, Rousset (FR)
Filed by STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed on Mar. 21, 2023, as Appl. No. 18/187,335.
Application 18/187,335 is a continuation of application No. 16/669,951, filed on Oct. 31, 2019, granted, now 11,637,947.
Claims priority of application No. 1860188 (FR), filed on Nov. 6, 2018.
Prior Publication US 2023/0224426 A1, Jul. 13, 2023
Int. Cl. H04N 5/06 (2006.01); G09G 5/00 (2006.01); G06F 1/04 (2006.01); H04N 23/80 (2023.01); G06F 3/041 (2006.01); H04N 5/04 (2006.01)
CPC H04N 5/06 (2013.01) [G06F 1/04 (2013.01); G09G 5/006 (2013.01); H04N 23/80 (2023.01); G06F 3/0416 (2013.01); G09G 2310/08 (2013.01); H04N 5/04 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit to be coupled to an electronic circuit, the integrated circuit comprising:
a timing signal generator comprising:
a tearing effect signal detector circuit configured to generate a first signal in response to detecting a first synchronization signal internal to the electronic circuit and available outside the electronic circuit,
a line counter circuit configured to generate, outside the electronic circuit, a second signal emulating a horizontal synchronization signal internal to the electronic circuit and not available outside the electronic circuit, and
a frame counter circuit configured to generate, outside the electronic circuit, a third signal emulating a vertical synchronization signal internal to the electronic circuit and not available outside the electronic circuit;
a trigger circuit configured to generate trigger signals for externally controlling the electronic circuit, the trigger circuit comprising a counter configured to count edges of the second signal or the third signal; and
a trigger signal generation circuit configured to generate second trigger signals based on current values of the counter.