US 11,895,109 B2
Securely provisioning a target device
Michael Hamburg, Laguna Beach, CA (US); Benjamin Che-Ming Jun, Burlingame, CA (US); Paul C. Kocher, San Francisco, CA (US); Daniel O'Loughlin, Aptos, CA (US); and Denis Alexandrovich Pochuev, Lafayette, CA (US)
Assigned to Cryptography Research, Inc., San Jose, CA (US)
Filed by Cryptography Research, Inc., San Jose, CA (US)
Filed on Apr. 15, 2022, as Appl. No. 17/722,226.
Application 17/722,226 is a continuation of application No. 16/804,555, filed on Feb. 28, 2020, granted, now 11,310,227.
Application 16/804,555 is a continuation of application No. 16/004,715, filed on Jun. 11, 2018, granted, now 10,581,838, issued on Mar. 3, 2020.
Application 16/004,715 is a continuation of application No. 14/535,194, filed on Nov. 6, 2014, granted, now 10,015,164, issued on Jul. 3, 2018.
Claims priority of provisional application 61/989,993, filed on May 7, 2014.
Claims priority of provisional application 61/990,050, filed on May 7, 2014.
Claims priority of provisional application 61/990,044, filed on May 7, 2014.
Prior Publication US 2022/0329587 A1, Oct. 13, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 9/40 (2022.01); H04W 12/06 (2021.01); G06F 21/60 (2013.01); G06F 21/62 (2013.01); G06F 21/72 (2013.01); G06F 21/73 (2013.01); G06F 21/33 (2013.01); H04W 12/30 (2021.01); H04W 12/0431 (2021.01); H04L 67/60 (2022.01)
CPC H04L 63/0853 (2013.01) [G06F 21/335 (2013.01); G06F 21/602 (2013.01); G06F 21/6209 (2013.01); G06F 21/72 (2013.01); G06F 21/73 (2013.01); H04L 63/0428 (2013.01); H04L 63/062 (2013.01); H04L 67/60 (2022.05); H04W 12/0431 (2021.01); H04W 12/06 (2013.01); H04W 12/35 (2021.01); G06F 2221/2107 (2013.01); G06F 2221/2135 (2013.01); G06F 2221/2145 (2013.01); G06F 2221/2149 (2013.01); G06F 2221/2153 (2013.01); H04L 63/123 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A target device comprising:
a System on Chip (SoC);
a register interface located on a SoC bus; and
a cryptographic circuit to control feature activation, configuration management, and secure key management of the target device, wherein the cryptographic circuit is accessed via the register interface, wherein the cryptographic circuit is to:
receive a module sequence from a tester device located at a first facility during an operation phase of a manufacturing lifecycle of the target device, wherein the tester device is operatively coupled to the target device and is an untrusted device, wherein the module sequence is generated by a module, the module being an application that, when executed by an appliance device, securely provisions a data asset to the target device via the tester device; and
perform a sequence of operations that securely provisions the data asset of the module to the SoC.