US 11,894,853 B2
Differential signal skew calibration circuit and semiconductor memory
Pengzhou Su, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Apr. 4, 2022, as Appl. No. 17/712,390.
Application 17/712,390 is a continuation of application No. PCT/CN2021/094240, filed on May 18, 2021.
Claims priority of application No. 202010489144.3 (CN), filed on Jun. 2, 2020.
Prior Publication US 2022/0224345 A1, Jul. 14, 2022
Int. Cl. H03L 7/183 (2006.01); H03K 19/1776 (2020.01); H03K 19/20 (2006.01); H03L 7/081 (2006.01)
CPC H03L 7/183 (2013.01) [H03K 19/1776 (2013.01); H03K 19/20 (2013.01); H03L 7/0818 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A differential signal skew calibration circuit, comprising:
a phase calibration circuit, configured to calibrate a phase of differential signals;
a phase detection circuit, a first end of the phase detection circuit being connected with an output end of the phase calibration circuit, wherein the phase detection circuit is configured to perform a preset logical operation on the differential signals to generate a phase difference pulse signal, and acquire a phase relationship of the differential signals according to the differential signals and the phase difference pulse signal; and
a phase adjustment control circuit, a first end of the phase adjustment control circuit being connected with a second end of the phase detection circuit, a second end of the phase adjustment control circuit being connected with a control end of the phase calibration circuit, wherein the phase adjustment control circuit is configured to receive the phase relationship, generate a phase calibration control instruction according to the phase relationship, and send the phase calibration control instruction to the phase calibration circuit to implement skew calibration of the differential signals;
wherein the phase detection circuit comprises:
a first detection circuit, a first end of the first detection circuit being connected with the output end of the phase calibration circuit, wherein the first detection circuit is configured to perform the preset logical operation on the differential signals to generate a first phase difference pulse signal and a second phase difference pulse signal; and
a second detection circuit, a first end of the second detection circuit being connected with a second end of the first detection circuit, a second end of the second detection circuit being connected with the first end of the phase adjustment control circuit, wherein the second detection circuit is configured to compare between amplitudes of the first phase difference pulse signal and the second phase difference pulse signal to obtain the phase relationship, and send the phase relationship to the phase adjustment control circuit.