CPC H03H 17/0223 (2013.01) [H03H 17/0211 (2013.01); H03H 17/06 (2013.01); H03H 2017/0245 (2013.01)] | 20 Claims |
1. A Scalable Finite Impulse Response (“SFIR”) filter comprising:
a pre-processing section;
a post-processing section; and
a finite impulse response (“FIR”) Matrix coupled to the pre-processing section and the post-processing section, wherein the FIR Matrix comprises:
a plurality of filter taps, each filter tap of the plurality of filter taps having at least:
a first input;
a second input;
a multiplexer coupled to the first input and the second input;
a first flip-flop coupled to an output of the multiplexer;
a second flip-flop;
a multiplier coupled between the first flip-flop and an adder, the multiplier being directly coupled to the adder;
the adder coupled between the second flip-flop and the multiplier, the adder receiving output directly from the second flip flop and the adder receiving output directly from the multiplier; and
a coefficient section directly coupled to a first input of the multiplier, the first input of the multiplier coupled solely to the coefficient section, the coefficient section to solely provide a coefficient; and
a plurality of signal paths arranged to allow re-configurable data throughput between each filter tap of the plurality of filter taps.
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