US 11,894,806 B2
Testing of a photovoltaic panel
Meir Adest, Modiin (IL); Guy Sella, Bitan Aharon (IL); Lior Handelsman, Givatayim (IL); Yoav Galin, Raanana (IL); Amir Fishelov, Tel Aviv (IL); Meir Gazit, Ashkelon (IL); Tzachi Glovinsky, Petah Tikva (IL); and Yaron Binder, Shoham (IL)
Assigned to Solaredge Technologies Ltd., Herzeliya (IL)
Filed by Solaredge Technologies Ltd., Herzeliya (IL)
Filed on Jan. 25, 2022, as Appl. No. 17/583,461.
Application 17/583,461 is a continuation of application No. 16/433,072, filed on Jun. 6, 2019, granted, now 11,264,947.
Application 16/433,072 is a continuation of application No. 15/357,442, filed on Nov. 21, 2016, granted, now 10,461,687, issued on Oct. 29, 2019.
Application 15/357,442 is a continuation of application No. 14/954,209, filed on Nov. 30, 2015, granted, now 9,537,445, issued on Jan. 3, 2017.
Application 14/954,209 is a continuation of application No. 13/015,219, filed on Jan. 27, 2011, granted, now 10,693,415, issued on Jun. 23, 2020.
Application 13/015,219 is a continuation in part of application No. 12/314,115, filed on Dec. 4, 2008, granted, now 8,324,921, issued on Dec. 4, 2012.
Claims priority of provisional application 61/039,050, filed on Mar. 24, 2008.
Claims priority of provisional application 60/992,589, filed on Dec. 5, 2007.
Prior Publication US 2022/0149783 A1, May 12, 2022
Int. Cl. H02S 50/00 (2014.01); H02S 40/30 (2014.01); H02S 50/10 (2014.01); G01R 27/02 (2006.01); H01L 31/02 (2006.01); G01R 31/40 (2020.01); H02M 3/10 (2006.01); H02M 7/48 (2007.01)
CPC H02S 50/10 (2014.12) [G01R 27/02 (2013.01); G01R 31/40 (2013.01); H01L 31/02021 (2013.01); H02M 3/10 (2013.01); H02S 40/30 (2014.12); H02S 50/00 (2013.01); H02M 7/48 (2013.01); Y02E 10/50 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a photovoltaic (PV) panel comprising a positive PV output terminal and a negative PV output terminal;
an electronic module comprising a first positive input terminal, a first negative input terminal, a second positive input terminal, and a second negative input terminal, wherein the first positive input terminal is connected to the positive PV output terminal, and wherein the first negative input terminal is connected to the negative PV output terminal;
a test module comprising a positive module output terminal and a negative module output terminal, wherein the positive module output terminal is connected to the second positive input, and wherein the negative module output terminal is connected to the second negative input; and
a bypass link connected directly between the positive PV output terminal and a positive input terminal of the test module and the negative PV output terminal and a negative input terminal of the test module, the bypass link comprising a first switch.