CPC H01S 5/0427 (2013.01) [H03K 5/003 (2013.01); H03M 1/66 (2013.01); H04B 1/0475 (2013.01); H04L 25/03343 (2013.01)] | 18 Claims |
1. An H-bridge integrated laser driver, comprising:
a retimer configured to convert low-speed parallel data to a high-speed serial bit stream and to an inverted representation of the high-speed parallel bit stream;
a multi-bit PMOS DAC configured to receive a first buffered bit stream;
a multi-bit NMOS DAC configured to receive a second buffered bit stream;
a first DC level-shifting predriver array coupled between the retimer and the PMOS DAC for receiving the high-speed parallel bit stream and the inverted high-speed parallel bit stream; and
a second DC level-shifting predriver array coupled between the retimer and the NMOS DAC for receiving the high-speed parallel bit stream and the inverted high-speed parallel bit stream;
wherein the first buffered bit stream is substantially synchronized with the second buffered bit stream.
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