US 11,894,580 B2
Battery interconnects
Kevin Michael Coakley, Belmont, CA (US); Malcom Brown, Mountain View, CA (US); and Paul Tsao, Los Altos, CA (US)
Assigned to CelLink Corporation, San Carlos, CA (US)
Filed by CelLink Corporation, San Carlos, CA (US)
Filed on Jul. 14, 2023, as Appl. No. 18/352,584.
Application 18/352,584 is a continuation of application No. 17/180,605, filed on Feb. 19, 2021.
Application 17/180,605 is a continuation of application No. 16/227,472, filed on Dec. 20, 2018, granted, now 10,964,931, issued on Mar. 30, 2021.
Application 16/227,472 is a continuation of application No. 15/289,028, filed on Oct. 7, 2016, granted, now 10,211,443, issued on Feb. 19, 2019.
Application 15/289,028 is a continuation in part of application No. 14/836,946, filed on Aug. 26, 2015, granted, now 9,545,010, issued on Jan. 10, 2017.
Application 14/836,946 is a continuation of application No. 14/671,814, filed on Mar. 27, 2015, granted, now 9,147,875, issued on Sep. 29, 2015.
Claims priority of provisional application 62/263,076, filed on Dec. 4, 2015.
Claims priority of provisional application 62/238,827, filed on Oct. 8, 2015.
Claims priority of provisional application 62/111,333, filed on Feb. 3, 2015.
Claims priority of provisional application 62/080,971, filed on Nov. 17, 2014.
Claims priority of provisional application 62/048,404, filed on Sep. 10, 2014.
Prior Publication US 2023/0369731 A1, Nov. 16, 2023
Int. Cl. H01M 50/581 (2021.01); H05K 1/11 (2006.01); H05K 1/18 (2006.01); H05K 3/40 (2006.01); H01M 10/48 (2006.01); H01M 50/526 (2021.01); H01M 50/522 (2021.01); H01M 50/503 (2021.01); H01M 10/42 (2006.01); H05K 1/02 (2006.01)
CPC H01M 50/581 (2021.01) [H01M 10/482 (2013.01); H01M 50/503 (2021.01); H01M 50/522 (2021.01); H01M 50/526 (2021.01); H05K 1/118 (2013.01); H05K 1/189 (2013.01); H05K 3/4092 (2013.01); H01M 10/4257 (2013.01); H01M 2200/103 (2013.01); H05K 1/0265 (2013.01); H05K 2201/0397 (2013.01); H05K 2201/056 (2013.01); H05K 2201/09081 (2013.01); H05K 2201/10037 (2013.01); H05K 2201/10181 (2013.01); Y02E 60/10 (2013.01)] 22 Claims
OG exemplary drawing
 
1. An interconnect circuit for interconnecting battery cells, the interconnect circuit comprising:
a conductive layer comprising conductive layer islands, each comprising a contact pad, a fusible link, and a remaining portion, wherein the contact pad is partially surrounded and separated from the remaining portion by a conductive layer channel; and
an insulating layer laminated to at least a portion of the conductive layer, wherein:
the insulating layer mechanically supports and maintains registration of the conductive layer islands relative to each other, and
the fusible link forms an electrical connection between the contact pad and the remaining portion,
the fusible link is configured to control a current flowing between the contact pad and the remaining portion and to break when the current exceeds a set threshold, and
at least a portion of the fusible link is freestanding and is not attached to the insulating layer,
the insulating layer comprises an insulating layer opening aligned and overlapping with the contact pad such that the contact pad is freestanding and is not attached to the insulating layer, and
the fusible link overlaps with the insulating layer opening.