CPC H01M 50/581 (2021.01) [H01M 10/482 (2013.01); H01M 50/503 (2021.01); H01M 50/522 (2021.01); H01M 50/526 (2021.01); H05K 1/118 (2013.01); H05K 1/189 (2013.01); H05K 3/4092 (2013.01); H01M 10/4257 (2013.01); H01M 2200/103 (2013.01); H05K 1/0265 (2013.01); H05K 2201/0397 (2013.01); H05K 2201/056 (2013.01); H05K 2201/09081 (2013.01); H05K 2201/10037 (2013.01); H05K 2201/10181 (2013.01); Y02E 60/10 (2013.01)] | 22 Claims |
1. An interconnect circuit for interconnecting battery cells, the interconnect circuit comprising:
a conductive layer comprising conductive layer islands, each comprising a contact pad, a fusible link, and a remaining portion, wherein the contact pad is partially surrounded and separated from the remaining portion by a conductive layer channel; and
an insulating layer laminated to at least a portion of the conductive layer, wherein:
the insulating layer mechanically supports and maintains registration of the conductive layer islands relative to each other, and
the fusible link forms an electrical connection between the contact pad and the remaining portion,
the fusible link is configured to control a current flowing between the contact pad and the remaining portion and to break when the current exceeds a set threshold, and
at least a portion of the fusible link is freestanding and is not attached to the insulating layer,
the insulating layer comprises an insulating layer opening aligned and overlapping with the contact pad such that the contact pad is freestanding and is not attached to the insulating layer, and
the fusible link overlaps with the insulating layer opening.
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