US 11,894,452 B2
Semiconductor device, method for manufacturing the same, power circuit, and computer
Tatsuo Shimizu, Shinagawa (JP); Masahiko Kuraguchi, Yokohama (JP); Toshiya Yonehara, Kawasaki (JP); and Akira Mukai, Kawasaki (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP)
Filed on Dec. 8, 2021, as Appl. No. 17/545,937.
Application 17/545,937 is a continuation of application No. 16/111,952, filed on Aug. 24, 2018, granted, now 11,227,942.
Claims priority of application No. 2018-039276 (JP), filed on Mar. 6, 2018.
Prior Publication US 2022/0102544 A1, Mar. 31, 2022
Int. Cl. H01L 29/00 (2006.01); H01L 29/778 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/205 (2006.01); H01L 21/3065 (2006.01); H01L 29/20 (2006.01); H01L 21/223 (2006.01); H01L 29/207 (2006.01); H01L 29/51 (2006.01)
CPC H01L 29/7786 (2013.01) [H01L 21/2233 (2013.01); H01L 21/2236 (2013.01); H01L 21/3065 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/207 (2013.01); H01L 29/4236 (2013.01); H01L 29/513 (2013.01); H01L 29/66462 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a nitride semiconductor layer;
a silicon oxide layer; and
a first region disposed between the nitride semiconductor layer and the silicon oxide layer and containing at least one element of hydrogen and deuterium,
wherein in a concentration distribution of the at least one element in the silicon oxide layer, the first region, and the nitride semiconductor layer, a distance between a first position at which a concentration of the at least one element has a maximum value and a second position present on the side of the nitride semiconductor layer with respect to the first position and having the concentration of the at least one element which is two orders of magnitude lower than the maximum value is 1 nm or less.