US 11,894,421 B2
Integrated circuit device with source/drain barrier
Feng-Ching Chu, Hsinchu (TW); Wei-Yang Lee, Taipei (TW); Yen-Ming Chen, Hsin-Chu County (TW); and Feng-Cheng Yang, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.V, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Aug. 9, 2021, as Appl. No. 17/397,728.
Application 17/397,728 is a continuation of application No. 17/001,464, filed on Aug. 24, 2020, granted, now 11,088,245.
Application 17/001,464 is a continuation of application No. 16/217,102, filed on Dec. 12, 2018, granted, now 10,756,171, issued on Aug. 25, 2020.
Application 16/217,102 is a continuation of application No. 15/796,968, filed on Oct. 30, 2017, granted, now 10,217,815, issued on Feb. 26, 2019.
Prior Publication US 2021/0376077 A1, Dec. 2, 2021
Int. Cl. H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01)
CPC H01L 29/0653 (2013.01) [H01L 21/02057 (2013.01); H01L 21/02227 (2013.01); H01L 21/30604 (2013.01); H01L 29/0847 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01); H01L 21/3065 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first protrusion disposed on a substrate, the first protrusion formed of a semiconductor material;
a first silicon-containing channel region disposed on a first portion of the first protrusion
a first gate structure wrapping around the first silicon-containing channel region;
a first source/drain feature disposed on a second portion the first protrusion; and
a second silicon-containing channel region disposed on a third portion of the first protrusion;
a second gate structure wrapping around the second silicon-containing channel region;
a first electrical barrier layer disposed under and interfacing with the first source/drain feature, the first silicon-containing channel region and the second silicon-containing channel region such that the first electrical barrier layer extends continuously from first silicon-containing channel region to the second silicon-containing channel region.