US 11,894,419 B2
Double-sided capacitor and fabrication method thereof
Yong Lu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Oct. 18, 2021, as Appl. No. 17/503,607.
Application 17/503,607 is a continuation of application No. PCT/CN2021/097161, filed on May 31, 2021.
Claims priority of application No. 202010498454.1 (CN), filed on Jun. 4, 2020.
Prior Publication US 2022/0037460 A1, Feb. 3, 2022
Int. Cl. H10B 12/00 (2023.01); H10N 97/00 (2023.01); H01L 23/522 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/91 (2013.01) [H01L 28/87 (2013.01); H01L 28/88 (2013.01); H01L 28/92 (2013.01); H10B 12/00 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A fabrication method for a double-sided capacitor, comprising the following steps:
providing a substrate, wherein a capacitor contact pad is formed on a surface of the substrate;
forming a stack structure on the substrate to cover the capacitor contact pad;
forming a capacitor hole in a direction perpendicular to the substrate to penetrate the stack structure and expose the capacitor contact pad, wherein the stack structure comprises sacrificial layers and supporting layers alternately stacked;
forming an auxiliary layer to cover a sidewall of the capacitor hole;
forming a first electrode layer to cover a surface of the auxiliary layer and the exposed capacitor contact pad;
removing a part of the supporting layer on a top of the stack structure to form an opening to expose the sacrificial layers;
removing the sacrificial layers and the auxiliary layer simultaneously along the opening to form a gap between the supporting layers and the first electrode layer; and
forming a dielectric layer covering a surface of the first electrode layer and a second electrode layer covering a surface of the dielectric layer, wherein the gap is at least filled with the dielectric layer.
 
12. A double-sided capacitor, comprising:
a substrate, having a capacitor contact pad on its surface;
a top supporting layer and a middle supporting layer, each of which is provided with a number of capacitor pores, and on a plane parallel to the substrate, a projection area of the middle supporting layer is greater than that of the top supporting layer, wherein the middle supporting layer is opened only at the capacitor pores, and a projection of the capacitor pores on the substrate overlaps with the capacitor contact pad;
a first electrode layer, being of a shape of a hollow column with an opening in the top, wherein the first electrode layer is perpendicular to the surface of the substrate and penetrates the top supporting layer and the middle supporting layer through the capacitor pores, wherein the bottom of the first electrode layer is in contact with the capacitor contact pad;
a dielectric layer, covering the surfaces of the first electrode layer, the top supporting layer and the middle supporting layer; and
a second electrode layer, covering the surface of the dielectric layer.