US 11,894,386 B2
Array substrate, manufacturing method thereof, and display panel
Peng Zhang, Guangdong (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Guangdong (CN)
Appl. No. 16/963,369
Filed by SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Guangdong (CN)
PCT Filed Jul. 9, 2020, PCT No. PCT/CN2020/101098
§ 371(c)(1), (2) Date Jul. 20, 2020,
PCT Pub. No. WO2021/248609, PCT Pub. Date Dec. 16, 2021.
Claims priority of application No. 202010534614.3 (CN), filed on Jun. 12, 2020.
Prior Publication US 2023/0253410 A1, Aug. 10, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 21/48 (2006.01); H01L 29/417 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/1225 (2013.01) [H01L 27/12 (2013.01); H01L 27/127 (2013.01); H01L 27/1288 (2013.01); H01L 29/41733 (2013.01); H01L 29/7869 (2013.01); H01L 29/78633 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate;
an active layer disposed on the substrate and comprising a channel area;
a metal contact layer disposed on the active layer and comprising a conductive area and an insulating area, wherein the insulating area corresponds to the channel area, and the conductive area is disposed at two sides of the insulating area;
a gate insulating layer disposed on the metal contact layer;
a gate layer disposed on the gate insulating layer and comprising a gate, wherein the gate is disposed above the channel area;
a source/drain layer disposed on the conductive area and comprising a source and a drain; and
a pixel electrode disposed on the source/drain layer and connected to the source or the drain;
wherein the source and the drain are individually connected to the conductive area.