US 11,894,346 B2
Semiconductor package having a high reliability
Ji-Hwan Hwang, Hwaseong-si (KR); Sang-Sick Park, Seoul (KR); Tae-Hong Min, Hwaseong-si (KR); and Geol Nam, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 10, 2023, as Appl. No. 18/182,246.
Application 18/182,246 is a continuation of application No. 17/329,036, filed on May 24, 2021, granted, now 11,664,352.
Application 17/329,036 is a continuation of application No. 16/824,403, filed on Mar. 19, 2020, granted, now 11,018,115, issued on May 25, 2021.
Application 16/824,403 is a continuation of application No. 16/200,109, filed on Nov. 26, 2018, granted, now 10,622,335, issued on Apr. 14, 2020.
Application 16/200,109 is a continuation of application No. 15/439,321, filed on Feb. 22, 2017, granted, now 10,153,255, issued on Dec. 11, 2018.
Claims priority of application No. 10-2016-0020695 (KR), filed on Feb. 22, 2016.
Prior Publication US 2023/0207533 A1, Jun. 29, 2023
Int. Cl. H01L 25/065 (2023.01); H01L 25/10 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 25/0655 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 21/563 (2013.01); H01L 23/3128 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06582 (2013.01); H01L 2225/06586 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1435 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1437 (2013.01); H01L 2924/1441 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a substrate base;
a first semiconductor device connected to the substrate base by a first connection terminal;
a second semiconductor device connected to the first semiconductor device by a second connection terminal;
a first underfill between the substrate base and the first semiconductor device; and
a second underfill between the first semiconductor device and the second semiconductor device,
wherein the first underfill has a first outer end in a horizontal direction parallel to an upper surface of the substrate base and the second underfill has a second outer end in the horizontal direction parallel to the upper surface of the substrate base,
a first horizontal distance from a vertical line along a side surface of the second semiconductor device to the first outer end is greater than a second horizontal distance from the side surface of the second semiconductor device to the second outer end, and
the first underfill has a first height ranging from about 5 μm to about 100 μm between the substrate base and the first semiconductor device, the second underfill has a second height of about 5 μm or greater and less than about 100 μm between the first semiconductor device and second semiconductor device, and the first height is greater than the second height.