US 11,894,234 B2
Semiconductor packages with die support structure for thin die
Francis J. Carney, Mesa, AZ (US); Chee Hiong Chew, Seremban (MY); Soon Wei Wang, Seremban (MY); and Eiji Kurose, Oizumi-machi (JP)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Jul. 19, 2022, as Appl. No. 17/813,351.
Application 17/813,351 is a division of application No. 16/879,251, filed on May 20, 2020, granted, now 11,404,276.
Application 16/702,958 is a division of application No. 15/679,661, filed on Aug. 17, 2017, granted, now 10,529,576, issued on Jan. 7, 2020.
Application 16/879,251 is a continuation in part of application No. 16/862,063, filed on Apr. 29, 2020.
Application 16/862,063 is a continuation in part of application No. 16/861,740, filed on Apr. 29, 2020.
Application 16/861,740 is a continuation in part of application No. 16/862,120, filed on Apr. 29, 2020, granted, now 11,430,746.
Application 16/861,740 is a continuation in part of application No. 16/702,958, filed on Dec. 4, 2019, granted, now 11,328,930, issued on May 10, 2022.
Application 16/702,958 is a continuation in part of application No. 16/395,822, filed on Apr. 26, 2019, granted, now 10,763,173, issued on Sep. 1, 2020.
Application 16/395,822 is a continuation of application No. 15/679,664, filed on Aug. 17, 2017, granted, now 10,319,639, issued on Jun. 11, 2019.
Prior Publication US 2022/0351978 A1, Nov. 3, 2022
Int. Cl. H01L 21/302 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 23/12 (2006.01)
CPC H01L 21/302 (2013.01) [H01L 21/48 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/12 (2013.01); H01L 23/3185 (2013.01); H01L 24/04 (2013.01); H01L 24/26 (2013.01); H01L 2224/94 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor die comprising a first largest planar surface, a second largest planar surface and a thickness between the first largest planar surface and the second largest planar surface; and
a temporary die support structure coupled to one of the first largest planar surface or the second largest planar surface;
wherein the semiconductor die is coupled with one of a substrate, a leadframe, an interposer, a package, a bonding surface, or a mounting surface;
wherein a perimeter of the temporary die support structure is less than and within a perimeter of the semiconductor die; and
wherein the thickness is between 0.1 microns and 125 microns.