CPC G11C 16/3459 (2013.01) [G11C 16/102 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01)] | 19 Claims |
1. A method, comprising:
applying a plurality of voltages as part of a pre-read portion of a read operation;
applying a first read voltage to a memory cell as part of a read portion of the read operation based at least in part on applying the plurality of voltages;
identifying a second read voltage that comprises a different polarity than the first read voltage based at least in part on applying the first read voltage; and
identifying a logic state stored by the memory cell based at least in part on applying the first read voltage and the second read voltage.
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