CPC G11C 16/16 (2013.01) [G11C 16/0483 (2013.01); G11C 16/102 (2013.01); G11C 16/26 (2013.01)] | 20 Claims |
1. A method of operating a memory device, comprising the steps of:
preparing a block that includes a plurality of memory cells arranged in a plurality of data word lines, the plurality of data word lines being arranged in a plurality of sub-blocks, at least some of the plurality of sub-blocks being not separated from one another by physical joints or by dummy word lines;
receiving an instruction to erase the memory cells of a selected sub-block of the plurality of sub-blocks;
reading data of at least one edge word line of at least one unselected sub-block of the plurality of sub-blocks, the at least one edge word line being located immediately adjacent the selected sub-block;
storing the data in a temporary location external of the block;
erasing the selected sub-block; and
re-programing the data to the memory cells of the at least one edge word line after erase of the selected sub-block is completed.
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