US 11,894,059 B2
Apparatus and method for programming data in a non-volatile memory device
Tae Hun Park, Gyeonggi-do (KR); and Dong Hun Kwak, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Dec. 10, 2021, as Appl. No. 17/547,834.
Claims priority of application No. 10-2021-0098925 (KR), filed on Jul. 28, 2021; and application No. 10-2021-0102602 (KR), filed on Aug. 4, 2021.
Prior Publication US 2023/0032133 A1, Feb. 2, 2023
Int. Cl. G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/34 (2006.01); G06F 3/06 (2006.01); G11C 11/56 (2006.01); G11C 16/24 (2006.01)
CPC G11C 16/10 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 11/5628 (2013.01); G11C 16/0483 (2013.01); G11C 16/24 (2013.01); G11C 16/3459 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory structure including at least one non-volatile memory cell capable of storing multi-bit data; and
a control device configured to:
perform a program verification after a first program pulse is applied to the at least one non-volatile memory cell,
determine a program mode for the at least one non-volatile memory cell based on a result of the program verification, and
change a level of a pass voltage, which is applied to another non-volatile memory cell coupled to the at least one non-volatile memory cell, from a first level to a second level which is higher than the first level or a setup time for changing a potential of a bit line coupled to the at least one non-volatile memory cell, according to the program mode,
wherein the performing, the determining and the changing are performed during a data program operation of applying a plurality of program pulses to program multi-bit data to the at least one non-volatile memory cell.