CPC G11C 16/10 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 11/5628 (2013.01); G11C 16/0483 (2013.01); G11C 16/24 (2013.01); G11C 16/3459 (2013.01)] | 20 Claims |
1. A memory device, comprising:
a memory structure including at least one non-volatile memory cell capable of storing multi-bit data; and
a control device configured to:
perform a program verification after a first program pulse is applied to the at least one non-volatile memory cell,
determine a program mode for the at least one non-volatile memory cell based on a result of the program verification, and
change a level of a pass voltage, which is applied to another non-volatile memory cell coupled to the at least one non-volatile memory cell, from a first level to a second level which is higher than the first level or a setup time for changing a potential of a bit line coupled to the at least one non-volatile memory cell, according to the program mode,
wherein the performing, the determining and the changing are performed during a data program operation of applying a plurality of program pulses to program multi-bit data to the at least one non-volatile memory cell.
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