CPC G09G 3/006 (2013.01) [H01L 27/0266 (2013.01); H10K 59/1213 (2023.02)] | 20 Claims |
1. A display substrate comprising:
a base substrate comprising a display area and a peripheral area surrounding the display area;
a common electrode located in the peripheral area and surrounding the display area;
a panel crack detection line located in the peripheral area and surrounding the display area, wherein the panel crack detection line is located on one side of the common electrode away from the display area; and
at least one electrostatic discharge circuit located in the peripheral area,
wherein the at least one electrostatic discharge circuit comprises at least one first thin film transistor comprising an active layer, a gate located on one side of the active layer away from the base substrate, and a source and a drain located on one side of the gate away from the base substrate, the source and the drain of the at least one first thin film transistor are electrically connected to the panel crack detection line, and the gate of the at least one first thin film transistor is electrically connected to the common electrode.
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