US 11,893,478 B2
Programmable output blocks for analog neural memory in a deep learning artificial neural network
Hieu Van Tran, San Jose, CA (US)
Assigned to SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US)
Filed by Silicon Storage Technology, Inc., San Jose, CA (US)
Filed on Jul. 5, 2021, as Appl. No. 17/367,542.
Application 17/367,542 is a continuation in part of application No. 16/353,830, filed on Mar. 14, 2019, granted, now 11,500,442.
Claims priority of provisional application 62/814,813, filed on Mar. 6, 2019.
Claims priority of provisional application 62/794,492, filed on Jan. 18, 2019.
Prior Publication US 2021/0334639 A1, Oct. 28, 2021
Int. Cl. G06N 3/065 (2023.01); G06N 3/04 (2023.01)
CPC G06N 3/065 (2023.01) [G06N 3/04 (2013.01)] 12 Claims
OG exemplary drawing
 
2. A programmable neuron output block for generating an output of a neural network memory array, comprising:
one or more input nodes for receiving current from a neural network memory array; and
a gain configuration circuit for receiving a gain configuration signal and applying a gain factor to the received current in response to the gain configuration signal to generate an output, wherein the gain configuration circuit comprises a variable resistor controlled by the gain configuration signal.