US 11,893,279 B2
Access tracking in memory
Cagdas Dirik, Indianola, WA (US); Robert M. Walker, Raleigh, NC (US); and Elliott C. Cooper-Balis, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 25, 2021, as Appl. No. 17/412,077.
Prior Publication US 2023/0064745 A1, Mar. 2, 2023
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 12/12 (2016.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 12/12 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a memory comprising a first access tracker and a second access tracker, wherein the first access tracker comprises an array of counters; and
a processor configured to execute executable instructions stored in the memory to:
receive a request to access a first page;
perform a hash function on a first page identification (ID) associated with the first page to determine whether an access count of the first page is in a specific index in the array of counters of the first access tracker;
transmit the access count of the first page to the second access tracker in response to the first page ID being in the first access tracker; and
transmit an access count of a second page ID associated with a second page with a lowest access count to the first access tracker in response to determining the second page ID associated with the second page has the lowest access count.