US 11,893,273 B2
Crash-safe tiered memory system
Robert T. Johnson, Scotts Valley, CA (US); Alexander John Horton Conway, Palo Alto, CA (US); Yi Xu, La Jolla, CA (US); Aishwarya Ganesan, Madison, WI (US); and Ramnatthan Alagappan, Madison, WI (US)
Assigned to VMware, Inc., Palo Alto, CA (US)
Filed by VMware, Inc., Palo Alto, CA (US)
Filed on Jan. 20, 2022, as Appl. No. 17/580,154.
Prior Publication US 2023/0229346 A1, Jul. 20, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of writing to a tiered memory system of a computing device, wherein the tiered memory system includes both volatile memory and persistent memory (PMEM), the method comprising:
in response to a first write request including first data to write to a first page located in the volatile memory:
copying contents of the first page to a second page located in the PMEM;
after copying the contents of the first page to the second page, writing the first data to the second page; and
after writing the first data to the second page, updating a first mapping of the tiered memory system from referencing the first page to referencing the second page.