US 11,891,713 B2
Semiconductor device manufacturing jig and method for manufacturing same
Takeyuki Suzuki, Kaga Ishikawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP); and TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo (JP)
Filed on Aug. 25, 2021, as Appl. No. 17/412,173.
Claims priority of application No. 2021-027290 (JP), filed on Feb. 24, 2021.
Prior Publication US 2022/0267920 A1, Aug. 25, 2022
Int. Cl. C25D 17/06 (2006.01); C25D 7/12 (2006.01); C25D 17/00 (2006.01)
CPC C25D 17/001 (2013.01) [C25D 7/123 (2013.01); C25D 17/004 (2013.01); C25D 17/005 (2013.01); C25D 17/06 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device manufacturing jig for electroplating a substrate,
the substrate including:
an inner part including a first surface and a second surface, the second surface being opposite to the first surface; and
an outer rim part surrounding the inner part, the outer rim part having a ring shape that protrudes further than the first surface in a direction perpendicular to the first surface,
the jig comprising a conductive member and a cover member, the substrate being clamped between the conductive member and the cover member,
the conductive member causing a current to flow in the inner part by contacting a portion of the first surface of the inner part without contacting the outer rim part, the conductive member including a contact part that contacts the portion of the first surface and,
the cover member having a ring shape, the cover member contacting the second surface of the inner part of the substrate at a side opposite to the first surface,
the conductive member having a groove that provides a space between the conductive member and the cover member, the outer rim part of the substrate being positioned in the space when the substrate is clamped between the conductive member and the cover member.