US 11,871,564 B2
Semiconductor structure and manufacturing method thereof
Yexiao Yu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 22, 2021, as Appl. No. 17/448,521.
Application 17/448,521 is a continuation of application No. PCT/CN2021/107740, filed on Jul. 22, 2021.
Claims priority of application No. 202110351087.7 (CN), filed on Mar. 31, 2021.
Prior Publication US 2022/0320113 A1, Oct. 6, 2022
Int. Cl. H01L 21/76 (2006.01); H10B 12/00 (2023.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01)
CPC H10B 12/488 (2023.02) [H01L 21/76224 (2013.01); H01L 21/76877 (2013.01); H10B 12/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor structure, comprising:
providing a substrate;
forming an initial trench in the substrate;
forming a sacrificial layer, the sacrificial layer comprising a first portion and a second portion, the first portion filling the initial trench and the second portion covering an upper surface of the substrate and an upper surface of the first portion;
forming a division groove in the second portion, to pattern the second portion into a sacrificial pattern, the sacrificial pattern being arranged corresponding to the first portion;
forming a filling layer in the division groove, the filling layer filling the division groove;
removing the sacrificial pattern and the first portion, to form a word line trench; and
forming a buried gate word line in the word line trench.