CPC H04N 23/741 (2023.01) [G06T 3/40 (2013.01); G06T 7/194 (2017.01); G06T 7/60 (2013.01); H04N 23/11 (2023.01); H04N 23/51 (2023.01); H04N 23/56 (2023.01); H04N 23/71 (2023.01); H04N 23/74 (2023.01); H04N 23/957 (2023.01); H04N 25/75 (2023.01); H04N 25/767 (2023.01); H04N 25/772 (2023.01); H01L 27/14681 (2013.01)] | 23 Claims |
1. A pixel integrated circuit in an array of pixel integrated circuits, the pixel integrated circuit comprising:
a signal converter, wherein the signal converter is arranged to receive a signal from a detector;
a multiplexer connected to an output of the signal converter;
two or more counters connected to outputs of the multiplexer; and
a sequencer connected to a control input of the multiplexer, wherein the sequencer comprises a counter that issues count values to the multiplexer.
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