CPC H04N 19/182 (2014.11) [G06N 3/02 (2013.01); G06T 7/11 (2017.01); H04N 1/413 (2013.01); H04N 1/64 (2013.01); H04N 9/67 (2013.01); H04N 19/186 (2014.11); H04N 19/33 (2014.11)] | 20 Claims |
1. A processor comprising:
one or more circuits to:
separate sensor data representative of a frame in a first raw image color space into a first frame layer corresponding to at least one first color element of the first raw image color space and a second frame layer corresponding to at least one second color element of the first raw image color space;
reconfigure the first frame layer and the second frame layer into a pseudo color space expression corresponding to a second raw image color space different from the first raw image color space, the pseudo color space expression including a first frame storing the at least one first color element and a second frame storing the at least one second color element;
compress the first frame and the second frame according to a compression algorithm associated with the second raw image color space to generate compressed frame data; and
store the frame using the compressed frame data.
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