US 11,870,643 B2
Reconfigurable multiplexer
Yang Hou, San Jose, CA (US); Reza Kasnavi, Solana Beach, CA (US); Jianxing Ni, San Jose, CA (US); and Shanshan Zhao, San Jose, CA (US)
Assigned to Skyworks Solutions, Inc., Irvine, CA (US)
Filed by SKYWORKS SOLUTIONS, INC., Irvine, CA (US)
Filed on Jun. 30, 2021, as Appl. No. 17/363,789.
Application 17/363,789 is a continuation of application No. 16/803,307, filed on Feb. 27, 2020, granted, now 11,088,909.
Application 16/803,307 is a continuation of application No. 15/366,435, filed on Dec. 1, 2016, granted, now 10,616,053, issued on Apr. 7, 2020.
Claims priority of provisional application 62/350,355, filed on Jun. 15, 2016.
Claims priority of provisional application 62/263,625, filed on Dec. 5, 2015.
Claims priority of provisional application 62/263,428, filed on Dec. 4, 2015.
Prior Publication US 2022/0006696 A1, Jan. 6, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 41/0816 (2022.01); H04B 1/00 (2006.01); H03F 3/24 (2006.01); H04L 41/0823 (2022.01)
CPC H04L 41/0816 (2013.01) [H03F 3/24 (2013.01); H04B 1/006 (2013.01); H04B 1/0057 (2013.01); H04L 41/0823 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A multiplexer configured to support carrier aggregation and non-carrier aggregation, the multiplexer comprising:
a filter bank including a set of filters, at least one filter of the set of filters configured to transmit a signal of a first frequency band and at least one other filter of the set of filters configured to transmit a signal of a second frequency band that differs from the first frequency band;
a load circuit bank including a plurality of load circuits configured to reduce insertion loss in the multiplexer;
a second load circuit bank including a second plurality of load circuits, the second load circuit bank connected to the filter bank;
a switch configured to selectively connect a filter from the filter bank to a load circuit from the second load circuit bank; and
a bypass circuit configured to connect an input port of the multiplexer to an output port of the multiplexer when a control signal received from a baseband processor indicates the multiplexer is to operate in a non-carrier aggregation mode and an input signal is associated with the first frequency band, and connect the input port of the multiplexer to a load circuit of the plurality of load circuits when the control signal indicates the multiplexer is to operate in a carrier aggregation mode.