US 11,870,581 B2
Apparatus, system and method of communicating an EDMG PPDU
Artyom Lomayev, Nizhny Novgorod (RU); Alexander Maltsev, Nizhny Novgorod (RU); Michael Genossar, Modiin (IL); Claudio Da Silva, Portland, OR (US); and Carlos Cordeiro, Portland, OR (US)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Filed by INTEL CORPORATION, Santa Clara, CA (US)
Filed on Oct. 16, 2022, as Appl. No. 17/966,847.
Application 17/966,847 is a continuation of application No. 17/326,113, filed on May 20, 2021, granted, now 11,509,422.
Application 17/326,113 is a continuation of application No. 16/488,006, granted, now 11,025,369, issued on Jun. 1, 2021, previously published as PCT/US2018/023765, filed on Mar. 22, 2018.
Claims priority of provisional application 62/475,472, filed on Mar. 23, 2017.
Claims priority of provisional application 62/475,485, filed on Mar. 23, 2017.
Prior Publication US 2023/0188258 A1, Jun. 15, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 1/06 (2006.01); H04L 25/02 (2006.01); H04L 5/00 (2006.01); H04L 27/26 (2006.01); H04B 7/0413 (2017.01)
CPC H04L 1/0681 (2013.01) [H04L 1/0625 (2013.01); H04L 25/0204 (2013.01); H04L 25/0242 (2013.01); H04L 5/0007 (2013.01)] 22 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a processor configured to cause an Enhanced Directional Multi-Gigabit (DMG) (EDMG) wireless communication station (STA) to:
identify a plurality of sequences of an EDMG Orthogonal Frequency Division Multiplexing (OFDM) mode, the plurality of sequences comprising a first sequence and a second sequence,
wherein the first sequence comprises a sequence [Seq1left, 176, 0, 0, 0, Seq1right, 176],
wherein Seq1left, 176={−1 −j −j +1 +j −j +1 −1 +1 −j −1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1 +1 +j +j −1 −j +j −1 +1 −1 +j +1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1 +j −1 −1 −j +1 −1 −j +j −j −1 +j −j +j −j −1 +j +j +1 +1 +1 +j +j +j −1 −1 −j +1 −1 −j +j −j −1 +j +j −j +j +1 −j −j −1 −1 −1 −j −j +j −1 −1 −j +1 −1 −j +j −j −1 +j −j +j −j −1 +j +j +1 +1 +1 +j +j −j +1 +1 +j −1 +1 +j −j +j +1 −j −j +j −j −1 +j +j +1 +1 +1 +j +j −1 −j −j +1 +j −j +1 −1 +1 −j −1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1 −1 −j −j +1 +j −j +1 −1 +1 −j −1 −1 +1 −1 +j +1 +1 −j −j −j +1 +1},
and Seq1right, 176={−1 −j −j +1 +j −j +1 −1 +1 −j −1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1 +1 +j +j −1 −j +j −1 +1 −1 +j +1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1 +j −1 −1 −j +1 −1 −j +j −j −1 +j −j +j −j −1 +j +j +1 +1 +1 +j +j +j −1 −1 −j +1 −1 −j +j −j −1 +j +j −j +j +1 −j −j −1 −1 −1 −j −j −j +1 +1 +j −1 +1 +j −j +j +1 −j +j −j +j +1 −j −j −1 −1 −1 −j −j +j −1 −1 −j +1 −1 −j +j −j −1 +j +j −j +j +1 −j −j −1 −1 −1 −j −j +1 +j +j −1 −j +j −1 +1 −1 +j +1 −1 +1 −1 +j +1 +1 −j −j −j +1 +1 +1 +j +j −1 −j +j −1 +1 −1 +j +1 +1 −1 +1 −j −1 −1 +j +j +j −1 −1},
wherein the second sequence comprises a sequence [Seq2left, 176, 0, 0, 0, Seq2right, 176],
wherein Seq2left, 176={+1 −j −j −1 +j −j −1 +1 −1 −j +1 +1 −j −j −1 +j −j −1 +1 −1 −j +1 +j +1 +1 −j −1 +1 −j +j −j +1 +j −j −1 −1 +j +1 −1 +j −j +j −1 −j +1 −1 +1 +j −1 −1 −j −j −j −1 −1 +1 −1 +1 +j −1 −1 −j −j −j −1 −1 +j −j +j −1 −j −j +1 +1 +1 −j −j −j +j −j +1 +j +j −1 −1 −1 +j +j +j +1 +1 −j −1 +1 −j +j −j +1 +j −j −1 −1 +j +1 −1 +j −j +j −1 −j −1 +j +j +1 −j +j +1 −1 +1 +j −1 −1 +j +j +1 −j +j +1 −1 +1 +j −1 −j +j −j +1 +j +j −1 −1 −1 +j +j +j −j +j −1 −j −j +1 +1 +1 −j −j +1 −1 +1 +j −1 −1 −j −j −j −1 −1 +1 −1 +1 +j −1 −1 −j −j −j −1 −1},
and Seq2right, 176={−1 +j +j +1 −j +j +1 −1 +1 +j −1 −1 +j +j +1 −j +j +1 −1 +1 +j −1 +j +1 +1 −j −1 +1 −j +j −j +1 +j −j −1 −1 +j +1 −1 +j −j +j −1 −j −1 +1 −1 −j +1 +1 +j +j +j +1 +1 −1 +1 −1 −j +1 +1 +j +j +j +1 +1 +j −j +j −1 −j −j +1 +1 +1 −j −j −j +j −j +1 +j +j −1 −1 −1 +j +j −j −1 −1 +j +1 −1 +j −j +j −1 −j +j +1 +1 −j −1 +1 −j +j −j +1 +j −1 +j +j +1 −j +j +1 −1 +1 +j −1 −1 +j +j +1 −j +j +1 −1 +1 +j −1 +j −j +j −1 −j −j +1 +1 +1 −j −j −j +j −j +1 +j +j −1 −1 −1 +j +j +1 −1 +1 +j −1 −1 −j −j −j −1 −1 +1 −1 +1 +j −1 −1 −j −j −j −1 −1}; and
transmit a field of an EDMG OFDM mode Physical Layer (PHY) Protocol Data Unit (PPDU) over a channel bandwidth of 2.16 Gigahertz (GHz) based on the plurality of sequences; and
a memory to store information processed by the processor.