US 11,870,555 B2
VLAN-aware clock synchronization
Harold Fong, Dublin (IE); Petr Budnik, Vancouver (CA); and Jeff Jing Yuen Chan, Vancouver (CA)
Assigned to Arista Networks, Inc., Santa Clara, CA (US)
Filed by Arista Networks, Inc., Santa Clara, CA (US)
Filed on Oct. 5, 2022, as Appl. No. 17/960,709.
Application 17/960,709 is a continuation of application No. 16/752,314, filed on Jan. 24, 2020, granted, now 11,502,767.
Claims priority of provisional application 62/888,370, filed on Aug. 16, 2019.
Prior Publication US 2023/0042925 A1, Feb. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04J 3/06 (2006.01); H04L 49/354 (2022.01); H04L 12/46 (2006.01); H04L 7/00 (2006.01)
CPC H04J 3/0673 (2013.01) [H04L 7/0008 (2013.01); H04L 12/4633 (2013.01); H04L 12/4641 (2013.01); H04L 12/4645 (2013.01); H04L 49/354 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method in a network device comprising a network device clock, the method comprising:
synchronizing (first synchronizing) the network device clock with a first clock in a first device on a first logical network to compensate for latency between the network device clock and the first clock, the first synchronizing including exchanging first messages between a port on the network device and a port on the first device, wherein the first messages include an identifier that identifies the first logical network;
synchronizing (second synchronizing) the network device clock with a second clock in a second device on a second logical network different from the first logical network, the second synchronizing including exchanging second messages between the port of the network device and a port on the second device, wherein the second messages include an identifier that identifies the second logical network, wherein the second synchronizing compensates for latency between the network device clock and the second clock;
determining a first port state for the port that corresponds to the first logical network based at least on clock data of the network device and clock data obtained from the first synchronizing; and
determining a second port state of the port that corresponds to the second logical network based at least on the clock data of the network device and clock data obtained from the second synchronizing.