CPC H04B 1/04 (2013.01) [H03M 1/74 (2013.01)] | 20 Claims |
1. A digital-to-analog converter (DAC) comprising:
a clock signal line;
an in-phase digital code line;
a quadrature digital code line;
a plurality of cells arranged in a plurality of columns and a plurality of lines;
a first column decoder coupled to a first portion of the plurality of cells, the clock signal line, and the in-phase digital code line;
a first matching circuit coupled to the first portion of the plurality of cells;
a second column decoder coupled to a second portion of the plurality of cells, the clock signal line, and the quadrature digital code line;
a second matching circuit coupled to the second portion of the plurality of cells; and
a hybrid coupler coupled to the first matching circuit and the second matching circuit.
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