US 11,870,428 B1
System and method for pulsed gate control of a transistor
David Grant Cox, Rosegg (AT); Aliaksandr Subotski, Villach (AT); and Jorge Arturo Ramirez Rivero, Villach (AT)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Aug. 26, 2022, as Appl. No. 17/896,183.
Int. Cl. H03K 17/042 (2006.01); H03K 17/082 (2006.01); G01R 19/165 (2006.01)
CPC H03K 17/0822 (2013.01) [G01R 19/165 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of controlling current through a transistor, the method comprising:
measuring a voltage across the transistor;
measuring a current through the transistor;
determining a safe operating current from a safe operating area (SOA) profile for the voltage measured across the transistor;
adjusting, for each of a first sequence of current pulses, a voltage of a voltage pulse applied to a control node of the transistor using a feedback controller until the current measured through the transistor is not greater than a first function of the safe operating current; and
adjusting, for each of a second sequence of current pulses after the first sequence of current pulses, the voltage of the voltage pulse applied to the control node of the transistor using the feedback controller until the current measured through the transistor is not greater than a second function of the safe operating current.