| CPC H03F 1/26 (2013.01) [H03F 3/19 (2013.01); H03F 2200/375 (2013.01)] | 20 Claims |
|
1. A receiver comprising:
a first circuit configured to receive an input signal, amplify a voltage difference between a voltage level of the input signal and a level of a reference voltage to generate first and second output signals, and output an internal signal, which is a digital signal corresponding to bits of the input signal, based on a voltage difference between the first output signal and the second output signal;
a second circuit configured to receive the input signal, amplify the voltage difference between the voltage level of the input signal and the level of the reference voltage to generate third and fourth output signals, generate an average voltage level of the third output signal through a first switching element in response to a control signal to output the average voltage level of the third output signal as a first feedback signal, and generate an average voltage level of the fourth output signal through a second switching element in response to the control signal to output the average voltage level of the fourth output signal as a second feedback signal; and
a control circuit configured to output the control signal of a pulse type whenever a logic level of the internal signal transitions, wherein the first and second switching elements are selectively turned on or off according to a logic pulse level of the control signal.
|