US 11,869,966 B2
Method for forming an insulation layer in a semiconductor body and transistor device
Hans Weber, Bayerisch Gmain (DE); Christian Fachmann, Fuernitz (AT); Franz Hirler, Isen (DE); Winfried Kaindl, Unterhaching (DE); and Markus Rochel, Radebeul (DE)
Assigned to Infineon Technologies Austria AG, Villach (AT)
Filed by Infineon Technologies Austria AG, Villach (AT)
Filed on Nov. 17, 2021, as Appl. No. 17/528,313.
Application 17/528,313 is a continuation of application No. 16/588,003, filed on Sep. 30, 2019, granted, now 11,211,483.
Claims priority of application No. 102018124418.5 (DE), filed on Oct. 2, 2018; and application No. 102018125340.0 (DE), filed on Oct. 12, 2018.
Prior Publication US 2022/0077309 A1, Mar. 10, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 21/3105 (2006.01); H01L 21/762 (2006.01); H01L 21/765 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01)
CPC H01L 29/7802 (2013.01) [H01L 21/265 (2013.01); H01L 21/31053 (2013.01); H01L 21/765 (2013.01); H01L 21/76224 (2013.01); H01L 21/823487 (2013.01); H01L 29/0634 (2013.01); H01L 29/402 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a trench in a first surface in an edge region of a semiconductor body;
forming a plurality of superjunction transistor cells in an inner region of a semiconductor body; and
forming an insulation layer on the first surface of the semiconductor body in the edge region and in the inner region,
wherein forming the insulation layer comprises a thermal oxidation process,
wherein forming the plurality of superjunction transistor cells comprises implanting dopant atoms in the inner region before forming the trench,
wherein implanting the dopant atoms comprises forming a plurality of first implanted regions one above the other in the semiconductor body and forming a plurality of second implanted regions one above the other in the semiconductor body,
wherein the first implanted regions include dopant atoms of a first doping type,
wherein the second implanted regions include dopant atoms of a second doping type complementary to the first doping type, and
wherein forming the insulation layer diffuses and activates the first type dopant atoms included in the first implanted regions and the second type dopant atoms included in the second implanted regions, thereby forming super junction structures of the superjunction transistor cells.