US 11,869,950 B2
Steep-slope field-effect transistor and fabrication method thereof
Yang-Kyu Choi, Daejeon (KR); and Myung-Su Kim, Daejeon (KR)
Assigned to KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, Daejeon (KR)
Appl. No. 17/437,368
Filed by Korea Advanced Institute of Science and Technology, Daejeon (KR)
PCT Filed Jul. 29, 2021, PCT No. PCT/KR2021/009918
§ 371(c)(1), (2) Date Sep. 8, 2021,
PCT Pub. No. WO2022/030884, PCT Pub. Date Feb. 10, 2022.
Claims priority of application No. 10-2020-0098003 (KR), filed on Aug. 5, 2020.
Prior Publication US 2022/0223705 A1, Jul. 14, 2022
Int. Cl. G11C 11/34 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); G11C 16/10 (2006.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01)
CPC H01L 29/42324 (2013.01) [G11C 16/10 (2013.01); H01L 29/40114 (2019.08); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A steep-slope field-effect transistor, comprising:
a source, a channel region, and a drain formed on a substrate;
a gate insulating film formed on an upper portion of the channel region;
a floating gate formed on an upper portion of the gate insulating film;
a transition layer formed on an upper portion of the floating gate; and
a control gate formed on an upper portion of the transition layer;
wherein the steep-slope field-effect transistor applies a potential of a reference voltage or more to the control gate to generate a potential difference between the control gate and the floating gate and discharges or brings in at least one charge stored in the floating gate.