US 11,869,931 B2
Semiconductor structure and method of forming the same
Ang Liu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Sep. 27, 2021, as Appl. No. 17/486,671.
Application 17/486,671 is a continuation of application No. PCT/CN2021/100517, filed on Jun. 17, 2021.
Claims priority of application No. 202110110494.9 (CN), filed on Jan. 27, 2021.
Prior Publication US 2022/0238640 A1, Jul. 28, 2022
Int. Cl. H10B 12/00 (2023.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/91 (2013.01) [H01L 28/92 (2013.01); H10B 12/31 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, comprising:
forming a substrate, wherein a plurality of capacitive contacts are provided in the substrate, a plurality of electrically conductive contact pads are provided at a surface of the substrate to be correspondingly connected to a plurality of capacitive contacts on a one to one basis, and a space is present between every two adjacent electrically conductive contact pads;
forming a filling layer that is fully filled in the space;
forming a stacked structure at the filling layer and a surface of the electrically conductive contact pads, wherein the stacked structure includes a plurality of supporting layers stacked one on another along a direction perpendicular to the substrate, the filling layer is in contact with the one supporting layer disposed at a bottom of the stacked structure, and an etching selection ratio between the filling layer and the supporting layer in contact therewith is greater than a preset value; and
etching the stacked structure to form a capacitance hole that runs through the stacked structure and exposes the electrically conductive contact pads.