US 11,869,888 B2
Polysilicon resistor structures
Meng-Han Lin, Hsinchu (TW); Wen-Tuo Huang, Tainan (TW); and Yong-Shiuan Tsair, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Jul. 21, 2022, as Appl. No. 17/870,415.
Application 17/870,415 is a division of application No. 16/549,077, filed on Aug. 23, 2019, granted, now 11,456,293.
Prior Publication US 2022/0359497 A1, Nov. 10, 2022
Int. Cl. H01L 27/06 (2006.01); H01L 21/8234 (2006.01)
CPC H01L 27/0629 (2013.01) [H01L 21/823418 (2013.01); H01L 21/823437 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a semiconductor substrate with spaced apart first and second isolation regions formed therein, wherein the first isolation region is wider than the second isolation region;
a resistor structure disposed on the first isolation region, wherein the resistor structure comprises:
a dielectric layer in contact with the first isolation region;
a nitride layer disposed on the dielectric layer;
a semiconductor layer disposed on the nitride layer, the semiconductor layer comprising a top doped layer overlying a bottom un-doped layer; and
a silicide covering an entire surface of the top doped layer; and
a transistor structure disposed between the first and second isolation regions, wherein the transistor structure comprises:
an interfacial layer in contact with the substrate, wherein the dielectric layer is disposed on the interfacial layer;
a metal gate electrode disposed on the dielectric layer; and
a source/drain region formed in the substrate and adjacent to the metal gate electrode.