US 11,869,748 B2
Substrate processing apparatus and method of manufacturing semiconductor device
Takeshi Yasui, Toyama (JP); Katsunori Funaki, Toyama (JP); Yasutoshi Tsubota, Toyama (JP); and Koichiro Harada, Toyama (JP)
Assigned to Kokusai Electric Corporation, Tokyo (JP)
Filed by Kokusai Electric Corporation, Tokyo (JP)
Filed on Sep. 8, 2020, as Appl. No. 17/014,684.
Application 17/014,684 is a continuation of application No. PCT/JP2018/011471, filed on Mar. 22, 2018.
Prior Publication US 2020/0402774 A1, Dec. 24, 2020
Int. Cl. H01J 37/32 (2006.01); C23C 14/00 (2006.01); C23C 14/06 (2006.01); C23C 16/44 (2006.01)
CPC H01J 37/321 (2013.01) [H01J 37/32697 (2013.01); C23C 14/0068 (2013.01); C23C 14/0641 (2013.01); C23C 16/4401 (2013.01); H01J 37/3244 (2013.01); H01J 37/32504 (2013.01); H01J 2237/0262 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A substrate processing apparatus comprising:
a process vessel in which a process chamber is provided, wherein a process gas is excited into plasma in the process chamber;
a gas supplier configured to supply the process gas into the process chamber;
a coil wound around an outer peripheral surface of the process vessel while being spaced apart from the outer peripheral surface, and wherein a high frequency power is supplied to the coil; and
an electrostatic shield disposed between the outer peripheral surface of the process vessel and the coil,
wherein the electrostatic shield comprises:
a partition extending in a circumferential direction of the coil and configured to partition between a part of the coil and the outer peripheral surface of the process vessel; and
an opening extending in the circumferential direction of the coil and opened between another part of the coil and the outer peripheral surface of the process vessel.