US 11,869,608 B2
Anti-fuse unit and anti-fuse array
ChihCheng Liu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jul. 26, 2021, as Appl. No. 17/384,945.
Application 17/384,945 is a continuation of application No. PCT/CN2021/080330, filed on Mar. 12, 2021.
Claims priority of application No. 202010271766.9 (CN), filed on Apr. 8, 2020.
Prior Publication US 2021/0350863 A1, Nov. 11, 2021
Int. Cl. G11C 17/16 (2006.01); H01L 23/525 (2006.01)
CPC G11C 17/16 (2013.01) [H01L 23/5252 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An anti-fuse circuit, comprising an anti-fuse device and a diode,
wherein an anode of the anti-fuse device is electrically connected with a bit line, a cathode of the anti-fuse device is electrically connected with an anode of the diode, and a cathode of the diode is electrically connected with a word line,
wherein the anti-fuse device comprises:
a gate layer located on a substrate, the gate layer being the anode of the anti-fuse device;
an anti-fuse injection layer located in the substrate, the anti-fuse injection layer being the cathode of the anti-fuse device; and
a gate oxide layer located between the gate layer and the anti-fuse injection layer.