US 11,869,573 B2
Semiconductor memory
Shuliang Ning, Hefei (CN)
Assigned to Changxin Memory Technologies, Inc., Hefei (CN)
Filed by Changxin Memory Technologies, Inc., Anhui (CN)
Filed on Aug. 7, 2021, as Appl. No. 17/396,689.
Application 17/396,689 is a continuation of application No. PCT/CN2020/128959, filed on Nov. 16, 2020.
Claims priority of application No. 202010243119.7 (CN), filed on Mar. 31, 2020.
Prior Publication US 2021/0366532 A1, Nov. 25, 2021
Int. Cl. G11C 11/40 (2006.01); G11C 11/4074 (2006.01); G11C 11/408 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC G11C 11/4074 (2013.01) [G11C 11/4085 (2013.01); H01L 24/08 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/08146 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/1427 (2013.01); H01L 2924/1436 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor memory comprising:
a memory chip comprising at least a storage array; and
a voltage regulation unit comprising at least an operational amplifier, wherein the voltage regulation unit is configured to convert an external input first voltage into a second voltage to be provided to a word line driver circuit associated with the memory chip, wherein the external input first voltage is greater than the second voltage, wherein the voltage regulation unit is an independent voltage regulation chip, and wherein the semiconductor memory further comprises a line substrate, wherein the line substrate includes a connection line and the memory chip and the voltage regulation chip are disposed on the line substrate, wherein the voltage regulation chip is connected to the memory chip through the connection line, and wherein the second voltage outputted by the voltage regulation chip is provided to the word line driver circuit associated with the memory chip through the connection line of the line substrate.