US 11,868,818 B2
Lock address contention predictor
Gregory W. Smaus, Austin, TX (US); John M. King, Austin, TX (US); Matthew A. Rafacz, Austin, TX (US); and Matthew M. Crum, Austin, TX (US)
Assigned to Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed by Advanced Micro Devices, Inc., Sunnyvale, CA (US)
Filed on Sep. 22, 2016, as Appl. No. 15/273,304.
Prior Publication US 2018/0081544 A1, Mar. 22, 2018
Int. Cl. G06F 9/52 (2006.01); G06F 9/50 (2006.01)
CPC G06F 9/52 (2013.01) [G06F 9/50 (2013.01)] 34 Claims
OG exemplary drawing
 
1. A method for locking an entry in a memory device, comprising:
executing a lock instruction of a thread to lock a particular memory entry of the memory device,
wherein the lock instruction is executed either speculatively or non-speculatively based on whether the particular memory entry was modified by a second thread during a window of exposure of an earlier speculative lock;
wherein executing the lock instruction non-speculatively includes disallowing modification by the second thread to the particular memory entry;
wherein executing the lock instruction speculatively includes permitting modification by the second thread to the particular memory entry; and
wherein the window of exposure is a time interval from a time when the particular memory entry was read during the earlier speculative lock to a time when the earlier speculative lock completed.