| CPC G06F 9/4881 (2013.01) [H04L 67/10 (2013.01); H04L 67/60 (2022.05); G06F 7/588 (2013.01)] | 15 Claims |
|
1. A method that enables task scheduling with a simulated annealing-based approach that provides task scheduling optimization in cloud computing infrastructures with multi-tasking and node structure that perform the big data analysis, comprising the following process steps:
determining the initial temperature, which is one of the main parameters that enable to bring a random first solution representing the problem at hand to the global optimum in the simulated annealing approach (1001),
determining the cooling ratio (α), which is the parameter that enables the initial temperature and the current temperature to be lowered gradually, when the number of inner loop iterations, that is used to determine how many times the perturbation process is performed to obtain the neighboring solutions, reaches its upper limit at each temperature value (1002),
determining the freezing point (ε), which is the parameter that enables the decision to terminate the algorithm by comparing the temperature with the new temperature reached as a result of reducing the temperature with the cooling ratio (1003),
determining the maximum number of inner loop iterations, which is the parameter that determines how many times the perturbation process will be performed at each temperature in the simulated annealing approach (1004),
determining the data structure which forms the programming structure of the one-dimensional (task-oriented) representation in the algorithm (1005),
determining the random number generation method that provides the random numbers needed by the initial solution and the other functions in the simulated annealing approach (1006),
determining the perturbation method that provides the neighboring solutions by modifying the current solution in the simulated annealing approach (1007),
determining the ratio of exploitation/exploration which indicates the rate of the perturbation methods that will also be determined by the proposed approach (1008),
creating a time profile that enables the determination and evaluation of the time spent by all functions during the search process (1009),
optimizing the cost function that calculates the cost of the solution produced in each iteration in the simulated annealing approach (1010),
determining the inner loop early termination (thermal equilibrium) criteria that allows the transition to a new temperature when the certain inner loop early termination condition is achieved, instead of going to the end of the pre-determined iteration at each temperature (1011),
determining the outer loop early termination criteria that allows the algorithm to be terminated in the cases where the current solution does not change after certain number of iterations (1012),
creating an initial (current) solution using the data structure, the random number generation method and the initial temperature determined by the algorithm (1013),
converting the current solution to a new (next) solution by using the perturbation methods and the exploitation/exploration ratio determined by the algorithm (1014),
calculating the costs of the generated solutions with the optimized cost function (1015),
reducing the temperature by the geometric cooling method by using the cooling ratio (α) (1016),
switching to a new temperature (thermal equilibrium state) if the number of solutions exceeds a threshold set by the user, where the cost of the new (next) solution is less than the cost of the current solution (1017),
terminating the program by comparing the freezing point with the new temperature reached as a result of reducing the temperature with the cooling ratio, or by using the outer loop early termination criteria in the cases where the current solution does not change after certain number of iterations (1018),
determining the effect of the compiler and optimization flags by means of testing to reduce the compile time of the algorithm and/or improve the performance (1019),
running the algorithm serially on a single-core microprocessor that the end-user can access and in parallel on a multi-core microprocessor by employing the multi-run method (1020),
implementing the proposed method as a hardware on an FPGA (1021).
|