US 11,868,695 B1
Driver resizing using a transition-based pin capacitance increase margin
Jhih-Rong Gao, Austin, TX (US); Yi-Xiao Ding, Austin, TX (US); and Zhuo Li, Austin, TX (US)
Assigned to Cadence Design Systems, Inc., San Jose, CA (US)
Filed by Cadence Design Systems, Inc., San Jose, CA (US)
Filed on Mar. 31, 2021, as Appl. No. 17/219,730.
Int. Cl. G06F 30/337 (2020.01); G06F 16/22 (2019.01)
CPC G06F 30/337 (2020.01) [G06F 16/22 (2019.01)] 19 Claims
OG exemplary drawing
 
1. A system comprising:
one or more hardware processors; and
at least one computer storage medium storing instructions, which, when executed by the one or more hardware processors, cause the one or more hardware processors to perform operations comprising:
accessing an integrated circuit design stored in a database in memory, the integrated circuit design comprising a net comprising a set of driver cells;
performing, by multiple processing threads, resizing of multiple driver cells in parallel, the performing of the resizing of the multiple driver cells comprising:
determining a capacitance increase margin for resizing a driver cell in the net based on a total capacitance of the net and a transition time target of the driver cell;
selecting, from a cell library, an alternative driver cell for resizing the driver cell such that a pin capacitance of the alternative driver cell exceeds an initial pin capacitance corresponding to the driver cell by no more than the capacitance increase margin;
replacing the driver cell with the alternative driver cell in the net;
storing an update to the integrated circuit design in the database in memory based on the alternative driver cell.