US 11,868,665 B2
Data processing near data storage
Nilesh N. Shah, Folsom, CA (US); Chetan Chauhan, Folsom, CA (US); Shigeki Tomishima, Portland, OR (US); Nahid Hassan, San Jose, CA (US); and Andrew Chaang Ling, Toronto (CA)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Feb. 25, 2022, as Appl. No. 17/681,512.
Application 17/681,512 is a continuation of application No. 16/779,086, filed on Jan. 31, 2020, granted, now 11,262,954.
Claims priority of provisional application 62/886,498, filed on Aug. 14, 2019.
Prior Publication US 2022/0179594 A1, Jun. 9, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 13/00 (2006.01); G06F 3/06 (2006.01); G06N 5/04 (2023.01)
CPC G06F 3/0679 (2013.01) [G06F 3/0613 (2013.01); G06F 3/0644 (2013.01); G06N 5/04 (2013.01); G11C 13/0004 (2013.01); G11C 13/0007 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a solid state drive (SSD) device comprising:
first circuitry to:
receive a configuration of at one type of command, the configuration to define an amount of media bandwidth allocated for the at one type of command,
receive a command, wherein a type of the received command is one of the at least one type of command and wherein the type of command comprises a compute command, and
assign the received command to second circuitry for execution based on the configuration, wherein the compute command is to cause processing of data read from a media and the second circuitry comprises a field programmable gate array (FPGA) and is to perform data pattern recognition, image recognition, and apply artificial intelligence and machine learning; and
third circuitry to provide a connection with the first circuitry.