| CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
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1. A method of operating a controller for controlling a memory device comprising a plurality of memory cell blocks, the method comprising:
outputting block address information based on reliability information for each of the memory cell blocks, the reliability information generated based on weighted retention times and weighted program-erase counts;
providing a patrol read command to the memory device; and
controlling the memory device to perform a patrol read operation in response to the patrol read command such that the patrol read operation is performed in an ascending order of reliabilities of the memory cell blocks based on the reliability information,
wherein the block address information comprises an order of the patrol read operation for the memory cell blocks based on the reliability information, and
the order of the patrol read operation indicates a first memory cell block having a highest priority, a second memory cell block having a lowest priority and a third memory cell block having a priority between the highest priority and the lowest priority.
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